To create a project with a single sheet with COM Express on it:

* Create a Project: File → New → Project → PCB Project. It creates a *.PrjPcb file. Save it as Beobot2_prototype1.PrjPcb. Save often. * Right click on the project name→ Add New to Project → Schematic * Go to the Schematic file * Right Click: place → part (p p shortcut) * on the “Place Part” window click … → install COM_Express.SchLib * place the component on the sheet. * To enlarge the sheet size: Right Click → Options → Documents Options. Set to Standard Size E for a bigger sheet area.

In terms of the project structure. We suggest to have a main.SchDoc as the main top level map that combines all the sub-schematics that may be quite general. This way they can be reused. For one, the file above should be renamed COM_Express.SchDoc so that it can be reused for not only the prototype phase but also for the final design.

This sheet can be embedded into the main file by: * Go to main file * Place → Sheet Symbol. Set the size by dragging the mouse to reshape the rectangle. * Right click on the symbol. Change Designator to COM Express 1 (change number for subsequent copy) and make the Filename to point to the proper file. * Right Click on the Project filename (*PrjPcb) → compile PCB Project.

We should now have a *PrjPcb file with a main.SchDoc and COM_Express.SchDoc file. We are going to break out the COM Express module connections from the latter file.

To view the schematics for the connection lines. Observe Kontron's ETX Express Design Guide page 18 - 21 (28 - 31 pdf page). In the schematics we see the ports that are implemented and not implemented for ETX-Express. For example only 2 SATA ports are implemented (SATA0 and SATA1 and not SATA2 nor SATA3). Also PCIe lines 0 - 3 are implemented, but not 4 and 5.

We will implement the following ports: * 2 SATA ports (1 regular, 1 external) * 1 Gigabit Ethernet * 1 Express Card port (1 PCIe and 1 USB 2.0 port). We will use PCIe2 and USB6. We may want to add another one, which would be for PCIe3 and USB7. * 1 KVM switch using VGA and 1 USB 2.0 port. * The remaining 7 USB 2.0 ports. * 1 AC97 audio data * 1 miscellaneous port for power, activity LED's, etc.

To cleanly break out signals, we have to properly group the pins into a harness. We will do this for a USB port and can reference it for the remainder ports. The actual pins needed for those ports are listed on the sub-schematic implementation section below.

These are the steps: * Create a Harness connector * Connect the signals to the Harness Connector * Add differential-pair rule and other specified rule (from the Design Guide) * Update main.SchDoc to include the port for COM Express.

For USB the signals are VCC, D+, D-, and GND. D+ and D- are differential pair data.

Note that we can perform cut and paste on these connectors. There is no need to go through the steps every time we need to create a connector.

So, we should just do it once for a USB port and copy and change the labels accordingly.

* Place → Harness → Harness Connector * Press <TAB> for properties. Harness Type: USB * Add entries VCC, D+, D-, GND * Place signal harness at the pointy end of the connector. Place → Harness → Signal Harness * Place the end port as well: Place → Port. Name it USB0. It will turn to blue for port harness.

* Place wire leads for USB0+ (pin A45) and USB0- (A46). Right Click → Place →Wire (shortcut: p w) * We will not connect VCC and GND because it messes up the compilation process. We will just use global VCC and GND. * To simplify the schematic we will not connect the ends using wires. We will use net labels. Right click → Place → Net Labels. * Press <TAB> for properties. Type USB0_N for USB0- and USB0_P for USB0+. * We do the same for the leads on the harness side. The two are now connected.

Differential pairs have a lot of rules that have to be met. Instead of trying to remember them all, we can have Altium create restrictions that we have to abide automatically. Note that we can create rules for things other than differential pairs.

We will use USB0 as an example.

For a pair of signals to be recognized as a differential pair, we have to keep the name convention to signal_N and signal_P. Altium will match the name up to the last underscore when we couple them for differential pair. Do not use + or - symbols (Use P or N) on net label names.

* Place → Directives → Differential Pairs. * Click on the wires that we will pair.

The pairing is done automatically by the names. SO, we can pair multiple pair signals at once.

Now we want to add all the other USB rules. These come from the Design Guide.

* Place → Directives → PCB Layout. * <TAB> for properties. * Click “Add as Rules” * Click “Edit Rule Values”

We then see all the design rule types. Go to the design guide for USB rules.

* FIX: Routing High Speed:Length Constraint * FIX: High Speed:Matched Net Length

A caveat: these rules may have to be repeated in the sub-schematics.

* Go to main.SchDoc * Right Click on the COM_Express.SchDoc sheet symbol * click Sheet Symbol Actions → Synchronize Sheet Entries and Ports * Place the new port accordingly

These sub-systems will rout out signals all the way to the connectors. In between, we may need circuits for things such over-current protection, EMI/ESD protection. We implement all the ports above: USB, Express Card, Gigabit Ethernet, Serial ATA, KVM, and the power related sub-system (An ATX specification).

The reference schematics is from Kontron's ETX-Express-MC page: 69 (pdf page)

We need to implement over-current, EMI, and ESD (Electro Static Discharge) protection.

over-current protection should be resettable without user mechanical intervention. We use a TSP2042AD power switch.

We always perform EMI protection using common mode chokes (a must). It is important that the component is chosen carefully to meet the requirements of the EMI noise filtering while retaining the integrity of the USB signals on the carrier board design. We use 330mA. It should be 'places as close as possible to USB connector signal pin'.

For ESD protection we add low capacitance steering diodes (Rail Clamps).

We will implement 1 of the possible 2 by using PCIe2 and USB6. A second card would use PCIe3 and USB7.

PCIE has two differential pairs for receiving (RX_P and RX_N) and and transmitting (TX_P and TX_N). USB has 1 data differential pair D_P and D_N.

In addition, there are a few signals that can be used: * EXCD0_CPPE# ExpressCard capable card request (EXCD1_CPPE# for second card) * EXCD0_PERST# ExpressCard reset (EXCD1_PERST# for second card) * SMB_DAT: System Management Bus clock signal * SMB_CK: System Management Bus data signal. * PCIE_RST#: PCI Express Bus Reset * CLKREQCEx#: Request for PCI Express Reference Clock.

The schematics is on page 44 of the ETX-Express design guide. An alternate plan would be from the Congatec Design Guide page 37. However, note that the schematics maybe are manufacturer dependent, that it's for a particular implementation of COM Express.

The COM Express connector has 26 pins + up to 4 shielding pins. It is best to use smart pin insert just like when creating the COM Express component. The other parts are quite easy to create.

There is one part LTC1326CS8 where we can try to utilize Altium's IPC Footprint Wizard.

* Tools → IPC Footprint Wizard. Clikc next. * Component Type SOIC * All the rest, dimensions, etc should come straight from the datasheet.

The COM Express Specification specifies that LAN magnetics must reside on the Carrier Board, not on the Module. The LAN interface consists of four differential pair signals: GBE0_MDI0+,- thru GBE0_MDI3+,-.

Additionally, there are four single-ended signals that provide link-status information:

* GBE0_LINK100# * GBE0_LINK1000# * GBE0_LINK# * GBE0_ACT#

along with a reference voltage GBE0_CTREF for the magnetics center tap.

We will use of 'RJ45 jacks with integrated magnetics' from Pulse (Digikey#: 553-1368-ND) to make things easier. We also need to terminate all unused connections on the RJ45 cable and the magnetics module to chassis ground.

For the magnetics module, separate the digital ground on the primary side and the chassis ground on the secondary side.

There are 3 SATA-300 (300Mbps) drives in the Kontron ETX Express. We are going to implement just SATA0 on board and SATA1 for external.

The input pins for a SATA port is: * SATA0_TX_P * SATA0_TX_N * SATA0_RX_P * SATA0_RX_N

There is also a SATA_ACT activity indicator pin. But, this pin will be added to the Misc section.

It also requires 3.3V, 5V, 12V, and GND signals.

Differential pairs for the TX and RX pairs. FIXXX

It has a data and power connection. We will use a connector that combined both and will be a right angle (as opposed to an upright connector):

FCI CONN RCPT SATA 22POS R/A SMD 10058523-00ALF (Digikey part number: 609-1079-ND).

[http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=428-1805-ND Cypress CY7C65640]

[http://www.maxim-ic.com/quick_view2.cfm/qv_pk/5186/t/al Maxim MAX4999]

[http://www.maxim-ic.com/quick_view2.cfm/qv_pk/5838 Maxim MAX4885]

The power is supplied from a power board (next to be implemented). Here we simply specify connection to that, the standard 24-pin ATX connection specification. We will use the 3.3V, 5V, and 12V. The -5V, -12V is also available but not routed out.

The naming conventions are: 3.3VCC, 5VCC, 12VCC.

In addition, we also have to rout out the power on/off circuits: * Power and Reset buttons (PWRBTN# and PWRRST# signal, respectively) to turn on the COM Express module. * PS_ON# power-on signal handler circuit. We have a 5V Standby power 5VCC_SBY to maintain power to the power control module in COM Express. This module allows the COM Express to handle power up event (a PS_ON signal on the ATX power supply) on the initial power on stage. We call this a “Soft on” power up. Another way to do it, “hard on” is done by grounding the PS_ON signal.

* to drag a component while keeping the wire connected: hold <ctrl> while dragging.

back beobot