We are going to use the Beobot2.0 base board schematics and rout it on a 4 layer PCB. Other (more expensive options) are 6 and 8 layers, which may ease routing.

The steps are as follows: * Create a blank PCB board with the desired board size (use the “PCB Board Wizard” on available at the “Files” tab on the left bottom side). * Transfer the Schematics to the board * Layout/place the components in the board. This is the key, it requires careful planning as we have to take into account differential pairs, size of major parts (CPU, SATA, RJ45 jack, etc), and power planes. * Place the trace routs with the differential pairs (high speed signals such as GBE, USB, and SATA), which have a lot of 'differential pair rules', having priority. Also note that within the diff. pairs there is also order of routing. The others, such as control, ground and power signals goes next. * Create the proper power and ground planes. For power, there is 3.3VCC and 12VCC islands within the main 5VCC plane. For ground VGA may need its own ground plane and GBE needs blanking (no planes directly the RJ45jack itself). Also note that, if the board is custom shaped, make sure the portions that will be cut off do not have any parts or ground/power planes on or near the cutout border. * Do a Design Rule Check for things such as diff. pair length matching. * Ready to be sent to PCB manufacturer but we need to create the manufacturing files (explained in the board manufacturing files page).

However, first, make sure that the project is already 'compiled (right-click on the project and click compile) and no errors are found'. If the errors you get is “net of a differential pair is not found”, try deleting and re-place the sheet symbols (in main sheet) of where the net is declared. This will force Altium to synchronize the input ports.

To start we will create a blank PCB board using the 'PCB Board Wizard': * Clicking on PCB Board Wizard in the New from Template section at the bottom of the Files panel. * Click next and set measurement. Use Imperials since our rules are all in mils. * Set size to 12” by 5” * Keep the keep-out distance from edge of board at '50mils', to add an extra 10mils for the minimum 40mils general guideline. * Choose 2 signal planes and 2 power planes * Save as B2_Prototype1.PcbDoc and drag it to the project Source Document listings

To rename the middle (power) layers: Design → Layer Stack Manager. Add GND on the second layer and 5VCC on the third layer.

Also, if there is white space around the board, that's the board sheet. type o (for options) and b (for board) and 'un-check “Display Sheet”.'

We can now transfer our schematics. * go to Main.SchDoc. Click Design → Update PCB Document * Click Validate Changes. If there are errors. Fix them first (cancel and go to the source of the problems).

Notice that there is a red label for each individual sub-schematics. They are called rooms. By dragging a room, all of the components belonging to the room also moves. All components has to be within its respective room. If not, the component will turn green. This means an error has occured (any error). In this case, it is an out-of-room error.

Other errors are: * footprint overlap, with a footprint on the same side or a through hole from the other side. * part is off the board.

The two biggest factor for layout are the size of the component and differential pair routing. Also when routing start with the highest priority sub-schematics first. There are times where, the part is simply has to be put on the other side of the board. But we also have to remember for differential pairs we want to minimize the vias, so just use 1 via to move the trace to the other side.

Examine the footprint of the COM Express connector and break out the signals.

Pay close attention to the differential pair locations. When envisioning the routed pairs, make sure the wires is not twisted. Otherwise, we would need a via.For ports such as GBE it is even more complicated: there are 4 pairs (GBE_MDI [0 - 3])of 2 pairs (RX and TX) of differential pairs. That's 16 nets altogether.

Observe the following illustration: 'FIXX ADD PICTURE' We naturally rout out the high speed modules so that they would not run into each other.

We now have a rough idea of where to place the modules. Go ahead and place the components of modules, especially the big components. The small ones can be rearranged later. Keep the components of the same module close to each other to make it easy to debug. This is where the rooms are useful.

To rotate (planar) a component: ' <shift> with the component selected.' To put a component on the other side of the board: 'press L with the component selected.'

From the mechanical perspective, remember that some part may need to be placed at specific location (buttons has to be on the top side, for example).

Other general rules to follow: * make sure there is enough room to small pins (at least 7.5mm) * Only header pins can be flipped (mirror about the board): click and press x. * capacitors near chip as much as possible

There are specific rules:

* make sure the TVS stub is as short as possible * no need for 0Ohm resistor to bypass Common Mode Choke as it is basically 2 0805 pads arranged side by side.

We rout the differential pairs first: * press 'p (for place) and click “Differential Pair Routing”' * Click on one of the lines in the pair and start placing copper * If we want to place a via press * and it will add it and move the trace to the other side of the board * At the ends, sometimes we may need to clean up rout individually. We can do this with '“p t” for place trace'. This is how we do the rest of the slow speed signals.

'To add a via/move to a different layer press *'

'NOTE:' * It is a good idea not to have 2 high speed signal cross each other, even when they are on different layers. Crossing high speed and low speed (on different layers), on the other hand, is ok.

* GND and various VCC should have at least 12mils (15 is good) trace and 30 mils via.

After we rout all the pins and vias we now have to see if the power and ground are properly connected. We have a default GND and 5VCC planes (done through Design → Layer Stack Manager).

However, for power, we also need 12V for COM Express and 3.3V for the RTC clock. For the 12V we will create an island to create a thick trace. For 3.3V, it will also be an island, but it is more complex as there are lots of 3.3VCC spread around the board. In both use '20Mils separation (between the planes) and at least 30 mils from the edge of the traces and vias to the separation.'

Let's try to build a split-plane island for 12VCC:

* Goto 5VCC layer * Place → Line (make the line be thick, 20mils) * Draw out the border that separates the 12VCC and 5VCC areas. * Name the split plane: <Right Click> on the plane (it should highlight the just created island → Properties → Connect To Net → 12VCC

On the COM Express the 12VCC input pins are grouped together at the end of each row. We would like to create a polygon to connect rows A with B and C with D. We do this on the COM Express footprint layer (top layer).

* Place → polygon Pour * Connect to Net: 12VCC * Draw out the Polygon * Add Via to connect to the 12VCC plane we just created.

We can also create separate ground planes (for VGA connector, for example) using the same split plane technique above.

On the other hand, there are also time where we do not want to have any planes underneath certain parts such as GBE's RJ45 jack or at the edge near the cutout line (usually because we do want to save money and cut the board shape ourselves as the manufacturing company charge more for non-rectangular shape).

To do this we do: * Place → Polygon Pour Cutout * make the cut by clicking at corners of the desired polygon. Usually we want about 100 mils from the edge.

After we are done with all the connections and the ground/VCC planes, the last step is to test if all the rules are followed.

We do this by running a Design Rule Check: Tools → Design Rule Check → Run.

There are a few usual suspects: * Dead copper or gaps in the the internal planes because of overlapping vias: try lining up the vias and create a spacing of about 70mils in between. * 'Matching Net Lengths on differential pairs': re-adjust the length by adding a few more curve to the shorter one or cutting unnecessary length on the longer one. To see what the current actual length is, delete a few traces from the end and redraw the traces while clicking '<Shift> - g '. The current length is displayed. Use it to compare the two traces. We can also use the interactive length tuning using Tools → Interactive Length Tuning or Interactive Diff Pair Length tuning.

For automatic serpentine: * Tools → Interactive Length Tuning. * Click on the shorter of the diff pair. * Press Tab and select “From Net”. For diff pair the other net is usually at the top of the list. * Click on the copper you would like to add the serpentine on and just move the cursor along the copper. It will stop adding serpentine once the length are matched.

Note that there is a list of hot keys, which can be accessed from: Help → Getting Started → Shortcut Keys.

* in the *PcbDoc to view 2D: press 2, 3D: press 3. Press 0 for top view. press v then b to flip view of board. * press v f to fit all components view. Press v d to fit document view. * We can re-adjust old rules or add additional rules by going to: Design → Rules * Changing width: <shift> w , while placing a trace. * FIXX??? checking violation: <shift> v * To toggle between single/multi layer mode: <shift> s * Change grid size: o g for option - grid * There is an alignment tool if right clicking to keep components in order. * To have Altium automatically rename the R_? components: Tools → annotate schematics quietly * Label size to be legible: 8mils thick and 48 mils height.

Back to electrical system beobot